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| NSTB60BDW1T1 PNP General Purpose and NPN Bias Resistor Transistor Combination * * * * * Simplifies Circuit Design Reduces Board Space Reduces Component Count Available in 8 mm, 7 inch/3000 Unit Tape and Reel ESD Rating - Human Body Model: Class 1B ESD Rating - Machine Model: Class B http://onsemi.com (3) (2) (1) Q2 Q1 R2 R1 (5) (6) MAXIMUM RATINGS (TA = 25C unless otherwise noted, common for Q1 and Q2) Rating Collector-Emitter Voltage Collector-Base Voltage Emitter-Base Voltage Collector Current - Continuous Symbol VCEO VCBO VEBO IC Q1 -50 -50 -6.0 -150 Q2 50 50 5.0 150 Unit Vdc Vdc Vdc mAdc 1 2 5 6 3 4 (4) THERMAL CHARACTERISTICS Characteristic (One Junction Heated) Total Device Dissipation TA = 25C Derate above 25C Thermal Resistance - Junction-to-Ambient Characteristic (Both Junctions Heated) Total Device Dissipation TA = 25C Derate above 25C Thermal Resistance - Junction-to-Ambient Thermal Resistance - Junction-to-Lead Junction and Storage Temperature 1. FR-4 @ Minimum Pad 2. FR-4 @ 1.0 x 1.0 inch Pad Symbol PD Max 187 (Note 1) 256 (Note 2) 1.5 (Note 1) 2.0 (Note 2) 670 (Note 1) 490 (Note 2) Max 250 (Note 1) 385 (Note 2) 2.0 (Note 1) 3.0 (Note 2) 493 (Note 1) 325 (Note 2) 188 (Note 1) 208 (Note 2) -55 to +150 Unit mW mW/C C/W 71d Symbol PD Unit mW mW/C C/W C/W C SOT-363 CASE 419B STYLE 1 MARKING DIAGRAM RJA 71 = Specific Device Code d = Date Code RJA RJL TJ, Tstg ORDERING INFORMATION Device NSTB60BDW1T1 Package SOT-363 Shipping 3000/Tape & Reel (c) Semiconductor Components Industries, LLC, 2002 1 June, 2002 - Rev. 2 Publication Order Number: NSTB60BDW1T1/D NSTB60BDW1T1 ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Q1 Collector-Base Breakdown Voltage (IC = -50 Adc, IE = 0) Collector-Emitter Breakdown Voltage (IC = -1.0 mAdc, IB = 0) Emitter-Base Breakdown Voltage (IE = -50 mAdc, IE = 0) Collector-Base Cutoff Current (VCB = -50 Vdc, IE = 0) Emitter-Base Cutoff Current (VEB = -6.0 Vdc, IB = 0) Collector-Emitter Saturation Voltage (IC = -50 mAdc, IB = -5.0 mAdc) (Note 3) DC Current Gain (VCE = -10 V, IC = -5.0 mA) (Note 3) Transition Frequency (VCE = -12 Vdc, IC = -2.0 mAdc, f = 100 MHz) Output Capacitance (VCB = -12 Vdc, IE = 0 Adc, f = 1.0 MHz) V(BR)CBO V(BR)CEO V(BR)EBO ICBO IEBO VCE(sat) hFE fT COB -50 -50 -6.0 - - - 120 - - - - - - - - - 140 3.5 - - - -0.1 -0.1 -0.5 560 - - Vdc Vdc Vdc mA mA Vdc - MHz pF Q2 Collector-Base Breakdown Voltage (IC = 50 A, IE = 0) Collector-Emitter Breakdown Voltage (IC = 1.0 mA, IB = 0) (Note 3) Collector-Base Cutoff Current (VCB = 50 V, IE = 0) Collector-Emitter Cutoff Current (VCE = 50 V, IB = 0) Emitter-Base Cutoff Current (VEB = 6.0 V, IC = 0) Collector-Emitter Saturation Voltage (IC = 10 mA, IB = 5.0 mA) (Note 3) DC Current Gain (VCE = 10 V, IC = 5.0 mA) (Note 3) Output Voltage (on) (VCC = 5.0 V, VB = 4.0 V, RL = 1.0 kW) (Note 3) Output Voltage (off) (VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kW) (Note 3) Input Resistor (Note 3) Resistor Ratio (Note 3) 3. Pulse Test: Pulse Width < 300 s, Duty Cycle < 2.0% V(BR)CBO V(BR)CEO ICBO ICEO IEBO VCE(sat) hFE VOL VOH R1 R2/R1 50 50 - - - - 80 - 4.9 15.4 1.70 - - - - - - - - - 22 2.13 - - 100 500 0.13 0.25 - 0.2 - 28.6 2.55 Vdc Vdc k Vdc Vdc nAdc nAdc mAdc Vdc http://onsemi.com 2 NSTB60BDW1T1 Typical Electrical Characteristics - PNP Transistor 2.0 hFE, NORMALIZED DC CURRENT GAIN 1.5 1.0 0.7 0.5 VCE = -10 V TA = 25C V, VOLTAGE (VOLTS) -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.2 -0.2 -0.5 -1.0 -2.0 -5.0 -10 -20 -50 -100 -200 IC, COLLECTOR CURRENT (mAdc) 0 -0.1 -0.2 VCE(sat) @ IC/IB = 10 -0.5 -1.0 -2.0 -5.0 -10 -20 IC, COLLECTOR CURRENT (mAdc) -50 -100 TA = 25C VBE(sat) @ IC/IB = 10 VBE(on) @ VCE = -10 V 0.3 Figure 1. Normalized DC Current Gain BANDWIDTH PRODUCT (MHz) Figure 2. "Saturation" and "On" Voltages 400 300 C, CAPACITANCE (pF) 200 150 100 80 60 40 30 20 -0.5 -1.0 -2.0 -3.0 -5.0 -10 -20 -30 IC, COLLECTOR CURRENT (mAdc) -50 VCE = -10 V TA = 25C 10 7.0 5.0 Cib TA = 25C 3.0 2.0 Cob f T, CURRENT-GAIN 1.0 -0.4 -0.6 -1.0 -2.0 -4.0 -6.0 -10 VR, REVERSE VOLTAGE (VOLTS) -20 -30 -40 Figure 3. Current-Gain - Bandwidth Product Figure 4. Capacitances 0.5 0.3 VCE = -10 V f = 1.0 kHz TA = 25C r b, BASE SPREADING RESISTANCE (OHMS) 1.0 hob, OUTPUT ADMITTANCE (OHMS) 150 140 130 120 110 100 -0.1 VCE = -10 V f = 1.0 kHz TA = 25C 0.1 0.05 0.03 0.01 -0.1 -0.2 -0.5 -1.0 -2.0 IC, COLLECTOR CURRENT (mAdc) -5.0 -10 -0.2 -0.3 -0.5 -1.0 -2.0 -3.0 IC, COLLECTOR CURRENT (mAdc) -5.0 -10 Figure 5. Output Admittance Figure 6. Base Spreading Resistance http://onsemi.com 3 NSTB60BDW1T1 Typical Electrical Characteristics - NPN Transistor VCE(sat) MAXIMUM COLLECTOR VOLTAGE (V) 1 IC/IB = 10 TA = -40C 25C 1000 VCE = 10 V hFE, DC CURRENT GAIN TA = 85C -40C 85C 100 25C 0.1 10 0.01 0 10 20 30 40 50 60 IC, COLLECTOR CURRENT (mA) 70 80 1 1 10 IC, COLLECTOR CURRENT (mA) 100 Figure 7. Maximum Collector Voltage versus Collector Current 4 3.5 Cob, CAPACITANCE (pF) 3 2.5 2 1.5 1 0.5 0 0 10 20 30 40 50 VR, REVERSE BIAS VOLTAGE (V) 60 f = 1 MHz IE = 0 A TA = 25C 100 IC, COLLECTOR CURRENT (mA) Figure 8. DC Current Gain TA = 85C 10 25C -40C 1 0.1 VO = 5 V 0 2 4 6 8 10 Vin, INPUT VOLTAGE (V) 12 14 0.01 Figure 9. Output Capacitance Figure 10. Output Current versus Input Voltage 100 Vin, INPUT VOLTAGE (V) TA = -40C 10 25C 1 85C VO = 0.2 V 0.1 0 10 20 30 40 50 IC, COLLECTOR CURRENT (mA) 60 Figure 11. Input Voltage versus Output Current http://onsemi.com 4 NSTB60BDW1T1 INFORMATION FOR USING THE SOT-363 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection 0.5 mm (min) interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 1.9 mm SOT-363 SOT-363 POWER DISSIPATION The power dissipation of the SOT-363 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SOT-363 package, PD can be calculated as follows: PD = TJ(max) - TA RJA SOLDERING PRECAUTIONS The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25C, one can calculate the power dissipation of the device which in this case is 256 milliwatts. PD = 150C - 25C 490C/W = 256 milliwatts The 490C/W for the SOT-363 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 256 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT-363 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad(R). Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. * Always preheat the device. * The delta temperature between the preheat and soldering should be 100C or less.* * When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10C. * The soldering temperature and time shall not exceed 260C for more than 10 seconds. * When shifting from preheating to soldering, the maximum temperature gradient shall be 5C or less. * After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. * Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. http://onsemi.com 5 EEE EEE EEE EEE EEE EEE EEE EEE EEE EEE EEE EEE EEE EEE EEE EEE 0.4 mm (min) 0.65 mm 0.65 mm NSTB60BDW1T1 SOLDER STENCIL GUIDELINES Prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. A solder stencil is required to screen the optimum amount of solder paste onto the footprint. The stencil is made of brass or stainless steel with a typical thickness of 0.008 inches. The stencil opening size for the surface mounted package should be the same as the pad size on the printed circuit board, i.e., a 1:1 registration. TYPICAL SOLDER HEATING PROFILE For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones, and a figure for belt speed. Taken together, these control settings make up a heating "profile" for that particular circuit board. On machines controlled by a computer, the computer remembers these profiles from one operating session to the next. Figure 7 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. This profile will vary among soldering systems but it is a good starting point. Factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. This profile shows temperature versus time. The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between 177-189C. When this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. The components on the board are then heated by conduction. The circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. Because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints. STEP 1 PREHEAT ZONE 1 RAMP" 200C STEP 2 STEP 3 VENT HEATING SOAK" ZONES 2 & 5 RAMP" STEP 5 STEP 4 HEATING HEATING ZONES 3 & 6 ZONES 4 & 7 SPIKE" SOAK" 170C 160C STEP 6 STEP 7 VENT COOLING 205 TO 219C PEAK AT SOLDER JOINT DESIRED CURVE FOR HIGH MASS ASSEMBLIES 150C 150C 100C 100C 140C SOLDER IS LIQUID FOR 40 TO 80 SECONDS (DEPENDING ON MASS OF ASSEMBLY) 50C DESIRED CURVE FOR LOW MASS ASSEMBLIES TIME (3 TO 7 MINUTES TOTAL) TMAX Figure 12. Typical Solder Heating Profile http://onsemi.com 6 NSTB60BDW1T1 PACKAGE DIMENSIONS SOT-363 CASE 419B-02 ISSUE J A G NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. DIM A B C D G H J K N S INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 EMITTER 2 BASE 2 COLLECTOR 1 EMITTER 1 BASE 1 COLLECTOR 2 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 6 5 4 S 1 2 3 -B- D 6 PL 0.2 (0.008) N M B M J C STYLE 1: PIN 1. 2. 3. 4. 5. 6. H K http://onsemi.com 7 NSTB60BDW1T1 Thermal Clad is a registered trademark of the Bergquist Company. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2700 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 NSTB60BDW1T1/D |
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